lpcware

How to use the grouped GPIO Interrupt on LPC4357 M0 core

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by Taniguchi on Tue Jul 30 04:40:02 MST 2013
Hi,

Is there someone who can use the grouped GPIO interrupt on LPC4357 M0 core?

I'm using LPC4357 Dev Kit manufactured by Embedded Artists AB and trying to use the grouped GPIO interrupt block (GROUP1) on M0 core.
However, M0_GINT1_IRQHandler function in cr_startup_lpc43xx-m0.c is not called from NVIC if CTRL register that displying interrupt status of GROUP1 is active.

I'm setting the register of the grouped GPIO by the following process.
If you find any mistakes, could you please correct them?

--------------------------------------------------------

// The purpose of these process is to receive interrupts
// from GPIO4[9] or GPIO4[12] (SW7 Joystic output - LOW active signal)

#include "core_cm0.h"
#include "LPC43xx.h"

void main (void)
{
    // Clear the interrupt status of GROUP1
    LPC_GPIO_GROUP_INT1->CTRL |= ( 0x1 );

    // Set polarity of GPIO4[9] and GPIO4[12] to LOW active.
    LPC_GPIO_GROUP_INT1->PORT_POL4 &= ~( 0x1 << 9 );
    LPC_GPIO_GROUP_INT1->PORT_POL4 &= ~( 0x1 << 12 );

    // Enable GPIO4[9] and GPIO4[12] for GROUP1 interrupt.
    LPC_GPIO_GROUP_INT1->PORT_ENA4 |= ( 0x1 ) << 9;
    LPC_GPIO_GROUP_INT1->PORT_ENA4 |= ( 0x1 ) << 12;

    // Set ISER register at NVIC to enable GROUP1 interrupt.
    NVIC_EnableIRQ( M0_GINT1_IRQn );
}
--------------------------------------------------------------

Taniguchi

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