lpcware

JTAG debug failing -- TRST and DBGEN function

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by aras on Mon Feb 18 14:31:23 MST 2013
Hi,

I am having trouble getting JTAG to work on a series of 6 simple prototypes. Two boards fire up, one somewhat intermittently and 3 fail always. We have an NGX 4330 xplorer board with exactly the same chip revision and that almost always connects over JTAG with Segger, Keil uLink, and Xpresso, but not with Olimex (due to capacitor on reset line/switch). We might have assembly problems, but everything else checks out to be connected fine so this seems rather unlikely/unlucky.

The part marking is:

      LPC4330FET100
      PFM906.04     05
      ESD1201ZRY

Which revision is this? -- not A or B apparently -- and what errata apply? What are the exact functions of TRST and DBGEN and their interaction? Is DBGEN latched on a reset signal? -- in other words would it be possible to have a race situation if both signals change together at startup?

Lastly, do all power domains have to be powered in order for JTAG to work on a 43xx? RTC included...

Thanks for you help, Richard.

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