LPC4357 how use both internal flash areas (2x 512kByte) as one (1MB)

lpcware · ‎06-15-2016

Content originally posted in LPCWare by Georg on Wed Dec 10 05:15:54 MST 2014
Hi,

i have a LPC4357 and need a solution to use both internal flash areas (2x 512kByte) as one (1MB) to fit bigger
projects to flash.

I use LPCXpresso to compile and link my projects.

Is it enough to define one area start by location 0x1A000000 with the Size of 0x100000 in MCU settings?
=> i tryed to compile and link a project with changed MCU settings. Compiling and linkig works but the project
doesnt work on my HW.

I thing j have to change the linkerfile manually. But how? Can one give me some help?

Thx.

Georg.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by lpcxpresso-support on Thu Dec 11 04:40:44 MST 2014

Quote: capiman

@lpcxpresso-support
Can you give a bit more details? Is it correct that the problem is the tool chain and its linker scripts,
not the LPC43xx itself?

As stated previously, the LPC4357 provides two completely separate flash banks. These are not contiguous within the memory map, such that there is a "hole" between the two banks. Note that typically, this dual bank structure is to allow you to do infield flash upgrades, where the new version is installed into the 'other' flash bank to where the current version is running from.

Anyway, because we have two separate flash banks on these parts, they are described as two separate memory regions in the linker script that LPCXpresso will generate by default, if you are using the managed linker script mechanism.

All your code will be located by the managed linker script mechanism into the flash bank that is listed first in the Memory Configuration Editor. There is no mechanism available to automatically start placing code into the second bank once the first bank is full.

Thus if you want to have things placed into the second flash bank, you need to take one of a number of possible steps yourself. For example:

1) Decorate functions that you want placing into the second flash bank, as described in the FAQ I previously provided a pointer to:

http://www.lpcware.com/content/faq/lpcxpresso/coderodata-different-flash-blocks

2) Modify either the linker script template, or (if you switch off the managed linker script mechanism) the actual linker script itself, to place code and data where you want it.

3) Again modify the linker script (or template) to cause rodata or the initial values of your (rw) data into the second flash bank. If you have a number of very large datatable, you can also do this very simply using the source code decorating method described in the above FAQ too.

Note that the other potential use of the second flash bank is in the case where you have a dual core application. You can then locate the M4 image into one bank, and the M0 image into the other bank. This will help to ensure that there is no contention caused by them running from the same block of memory. For more details please see the LPCXpresso User Guide, plus the FAQ at:

http://www.lpcware.com/content/faq/lpcxpresso/lpc43xx-multicore-apps

Regards,
LPCXpresso Support

lpcware · ‎06-15-2016

Content originally posted in LPCWare by capiman on Wed Dec 10 12:30:01 MST 2014
@Georg
Your problem seems to be that the two flash areas are not directly located one after the other, but with a gap between.

@lpcxpresso-support
Can you give a bit more details? Is it correct that the problem is the tool chain and its linker scripts,
not the LPC43xx itself?

Usually (when only using one flash bank) you have a linker scripts like

MEMORY
{
     FLASH (rx) : ORIGIN = 0x1A000000, LENGTH = 0x00080000
     SRAM (rwx) : ORIGIN = 0x10080000, LENGTH = 0x0000A000
}

When using two banks you would have something like

MEMORY
{
     FLASH1 (rx) : ORIGIN = 0x1A000000, LENGTH = 0x00080000
     FLASH2 (rx) : ORIGIN = 0x1B000000, LENGTH = 0x00080000
     SRAM (rwx) : ORIGIN = 0x10080000, LENGTH = 0x0000A000
}

But there you have a limitation that linker must be able to handle multiple flash section?
Or is there a way(or tool chain) which supports this?

Another idea:

MEMORY
{
     FLASH (rx) : ORIGIN = 0x1A000000, LENGTH = 0x01080000
     SRAM (rwx) : ORIGIN = 0x10080000, LENGTH = 0x0000A000
}

But then you must somehow define that between 0x1A080000 and 0x1AFFFFFF nothing can be located. Don't know if this can be done...

Would it be possible (just a general question, not saying it is a good idea), that a (BIG) bootloader is located in flash bank A,
and a (BIG) application is located in flash bank B.
Bootloader does something (even offering a lot utility functions like ROM API for the application) and finally jumps to application.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by lpcxpresso-support on Wed Dec 10 06:06:11 MST 2014
The two flash banks are completely separate. There is no way to automatically merge them but LPCXpresso does provide a means to place particular items into the second bank though. For details, please see:

http://www.lpcware.com/content/faq/lpcxpresso/coderodata-different-flash-blocks

And for background information on the LPC43 support, there are a number of other FAQs that you should read, starting with :

http://www.lpcware.com/content/faq/lpcxpresso/lpc18-lpc43-support

Regards,
LPCXpresso Support