Issues about SSP in SPI Mode (Chip Select Pin)

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by Witte on Thu Sep 25 12:44:30 MST 2014
Hey there,

I'm using SSP1 in SPI Mode on my project and I have a problem with the CS Pin.
I notice what each byte sent the CS Pin is put in High. For me this is a problem, because I need the pin in LOW until the last byte of my package.

Looking for a resolution in the forum I found this link: http://www.lpcware.com/content/forum/ssp-port-problem-spi-mode

This guy have the same problem... The question is... This BIG BUG on SSP peripherical occurs on LPC43xx Family too?

I resolve the problem configuring the CS Pin with a simple GPIO. So, I set the state manualy.