Apparent buffer overflow when using DMA with HS ADC

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by hairy.lee on Wed Jun 08 07:34:30 MST 2016

I'm running the HS ADC at 12MHz and, using the LabTool code as a basis for capturing a block of samples, sampling a 10kHz Sine Wave. I'm not interested in trigger levels.

Using a waveform generator attached to the EXP_ADC0_DAC input of my LPC Link 2 board I can capture 8192 packed samples to SRAM (0x2000 0000 -> 0x2000 4000). However, when I dump them out and plot them (see 12kHz Sine image) I observe what appears to be either missed samples or a wrap around, I suspect the later. If anyone can identify the glaring mistake I'm making it would be appreciated as I clearly cant; Am I not terminating the process correctly in the ISR or is it a configuration issue?

Thanks in advance.


Original Attachment has been moved to: HSADC.c.zip