lpcware

Too many IRQs for ADC (LPC4078)

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by g_mocken on Tue Feb 02 08:51:56 MST 2016
Following the sample code and docs, I initialize the AD conversion roughly like the following:

static ADC_CLOCK_SETUP_T ADCSetup;
Chip_ADC_Init(LPC_ADC, &ADCSetup);
Chip_ADC_EnableChannel(LPC_ADC, _ADC_CHANNEL, ENABLE);
Chip_ADC_SetBurstCmd(LPC_ADC, ENABLE);
Chip_ADC_SetStartMode(LPC_ADC, ADC_NO_START, ADC_TRIGGERMODE_RISING);
Chip_ADC_SetSampleRate(LPC_ADC, &ADCSetup, 1000); // <-- sample rate 1000 Hz

NVIC_EnableIRQ(ADC_IRQn);
Chip_ADC_Int_SetChannelCmd(LPC_ADC, _ADC_CHANNEL, ENABLE);


My ISR looks like this:

uint16_t dataADC;
Chip_ADC_ReadValue(LPC_ADC, _ADC_CHANNEL, &dataADC);
NVIC_ClearPendingIRQ(ADC_IRQn);

The result however is (I checked by toggeling a GPIO line and using a scope) that the ISR is called at a rate of around 6379 Hz instead of 1000 Hz (as configured). The ADC samples themselves are correct.

When I vary the sample rate in Chip_ADC_SetSampleRate(), the IRQ rate also changes, but the relation between the two does not make much sense (e.g. twice the rate: 2000 Hz result in measured 4560 Hz)

Is there something wrong in the clock setup or is there any additional IRQ register that I need to clear in the ISR (to preventing it from being called several times for the same IRQ)?

Any hints would be appreciated,

G.

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