SPI boot clock frequency

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by jond on Wed Aug 19 01:50:31 MST 2015

We're considering a switch from NAND boot to SPI EEPROM boot.

In the LPC32x0 user manual (UM10326), figure 131 (SPI boot procedure), fsck is defined as fosc/2.

As 'fosc' isn't referenced anywhere else in the document, we would like to confirm what it is before we select an EEPROM part and modify the board layout.

Is fosc just the external crystal oscillator frequency? For example if we use a 13MHz crystal for SYSX then will the boot SPI clock be 6.5MHz?

Many thanks,