Content originally posted in LPCWare by ArSchlegel on Tue Apr 15 07:58:13 MST 2014 Hi,
i'm trying to interface a tft display with SSD1963 controller with an LPC313x using the SRAM-Interface. I read and studied the MPMC and the patch by Jean-Christian de Rivaz (http://www.lpclinux.com/Forums/LPC313xLinuxPatch0003) regarding a kernelpatch to add support for the SSD1289. After understanding how the MPMC works with a display controller i ported the driver to the SSD1963. But it won't work. I have experience on that controller on other platforms (S12X, AVR, Raspberry Pi via GPIO, ...). So i wrote a userspace application interfacing with the MPMC registers to write the SRAM-interface in an easy debuggable program. For a test i tested my software with little adaptions for the SSD1289. With this controller it works fine.
In the SSD1963 datasheet there is a note that until the controllers PLL isn't configured and locked it can only be programmed with 10MHz/2 (5MWords/second). So i need to initialize the PLL to gain full writing speed on the display. Unfortunately the display won't accept my commands. I have trimmed down the timings to write less speedy on the bus (see print_00.png for an example plot of the bus writing). As you can see my timings are well below 5MWords/s...
When i program set the PLL MN register with my values and read them back i just get the default reset values from the controller. When i read the device signature i get the expected values. So reading from the device works just fine.
Except the code that writes the data on the physical bus the rest of the code is the exact same as for my AVR, Raspberry, ... projects. So i know the display and especially the initialzation routine works.
Can anyone give me a hint why my LPC wont interface correctly with my SSD1963?
