Content originally posted in LPCWare by Rakutaro on Tue Mar 13 02:47:54 MST 2012
Hi,
I'd like to know the MAC behavior of LPC1850.
I couldn't find the topic in this forum.
I'm making an ethernet driver with the using ISR.
I'm facing a trouble for the ISR behavior.
In case of PING from PC side, it's working well.(64 bytes)
However, in case of 203bytes PING, the MAC doesn't work.
In case of 202bytes PING, the MAC is working well.
203 bytes means for the following caliculation.
payload 203 bytes
preamble 8 bytes
IP tracks 42 bytes
FCS 4 bytes
total 257 bytes
202 bytes means for the following caliculation.
payload 202 bytes
preamble 8 bytes
IP tracks 42 bytes
FCS 4 bytes
total 256 bytes
I have a concern about internal RXFIFO size limitation as 256 bytes.
I've tried the both ringed buffer and chained buffer, the results were same.
The problem looks like a related both DMA descriptor and size limitation for the internal RxFIFO with the using interrupt.
I've also checked sample code in the lpcware site, the code is using polling technic for the receive side.
It was no trouble found for any byte size. Why?
I'd like to use the interrupt for the performance.
Therefore, I'd like to know the behavior whether the MAC with interrupt is abnormality, or not.
Kindly Regards,
Raku
