LPC1857  Performance

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by nesrine on Fri Feb 13 07:27:40 MST 2015
I work with MCB1857 KEIL eval board, and i use µvision V5.13.0.0
I do the portage of the coreMark in the LPC1857 architecture;
My problem that in my project i have difficulties to decrease frequency and to manipulate flash acceleration  because it is the first one that i use NXP product,
Please find Attached my project and help me to configure my LPC in different frequency:

I think taht in the projct I should modify this function but haw i modify it in order to have differents frequency

/* Set up and initialize clocking prior to call to main */
void Board_SetupClocking(void)
int i;

/* Setup FLASH acceleration to target clock rate prior to clock switch */

Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);

/* Setup system base clocks and initial states. This won't enable and
   disable individual clocks, but sets up the base clock sources for
   each individual peripheral clock. */
for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
Chip_Clock_SetBaseClock(InitClkStates.clk, InitClkStates.clkin,
InitClkStates.autoblock_enab, InitClkStates.powerdn);

/* Reset and enable 32Khz oscillator */
LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2));
LPC_CREG->CREG0 |= (1 << 1) | (1 << 0);

/* Setup a divider E for main PLL clock switch SPIFI clock to that divider.
   Divide rate is based on CPU speed and speed of SPI FLASH part. */
#if (MAX_CLOCK_FREQ > 180000000)
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 5);
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 4);
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);

/* LCD with HX8347-D LCD Controller                                         */
/* Attach main PLL clock to divider C with a divider of 2 */
Chip_Clock_SetDivider(CLK_IDIV_C, CLKIN_MAINPLL, 2);

Thank you