NXP LPX1857 EMC SDRAM Read failure

[lpcware]

Content originally posted in LPCWare by KennethSoohoo on Thu Dec 27 17:21:14 MST 2012
All,

I'm working on bring-up on a simple LPC1857-based board.
The SDRAM is an IS42S16100E, which is different / smaller than all the existing examples.
I use this configuration:
LPC_EMC->DYNAMICCONFIG0    = 0<<14 | 0<<12 | 0<<9 | 1<<7; /* 16Mb, 1MBx16, 2 banks, row=11, column=8 */
The board's XTAL is 20Mhz.  So I made this change:
CGU_SetXTALOSC(20000000);
and I run the board at 100Mhz using this setting:
CGU_SetPLL1(5);/* 5 * 20Mhz = 100Mhz */

I modified the SDRAM_Init.c from the ISI42S16400D sample.

I've created a simple SDRAM test, and I believe that I can write to the SDRAM with my current configuration.

****
Immediately after writing a value, I can read it back... but a second read on an address that I have not accessed always hangs the system.
So this loop always fails in the inner loop on j == 1.
pSDRAM = (unsigned long *)SDRAM_ADDR_BASE;
for (i = 0; i < 256; ++i)
{
pSDRAM = i | (i << 24);
                for (j = 0; j < 256; ++j)
                {
                  data[j] = pSDRAM[j];
                }
}
****

Any suggestions on where to look?

Thanks,
Ken

[lpcware]

Content originally posted in LPCWare by RemcoHosman on Thu Jan 31 09:12:15 MST 2013
I am seeing the same issue with a LPC1857 and a A43L0616B SDRAM device (same width, size and layout as above).

I have not been able to reproduce the error 100% of the time. sometimes it works.
To eliminate timing issues, i have reduced the core (and EMC) speed to 10MHz and adjusted the refresh time accordingly.

I am reading/writing to ram via a:
volatile Int32U ram[524288] @ 0x28000000;



Remco

[lpcware]

Content originally posted in LPCWare by nxp21346 on Fri Jan 11 17:17:45 MST 2013
Hi Ken,

That is a tough problem. I have never seen an SDRAM issue where the CPU is hung while trying to read, I have only seen issues where incorrect data is read from the SDRAM (usually due to mode register settings). With SDRAM there is no mechanism to force the CPU to stall forever so this shouldn't happen. Can you tell me how data[] is declared?

Thanks!
-Dave @ NXP