lpcware

DAC Pin allocation for 1857

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by LRWEng on Wed Feb 04 15:06:06 MST 2015
I'm doing pin allocation for an 1857 design. There is one DAC and apparently 4 choices of pins for it to come out.

General notes say that P4.3 and P4.4 and PC.3 are multi-func port pins for ADCX-0 and the DAC. It is also mentioned as sharing a DEDICATED ADCX-0 pin (E3) in Table3 of the spec
sheet under "ADC Pin Selection".

I'm aware of preconditioning the pin function for analog with SFS regs, and then selecting the DAC function with a bit in ENAIO2 register. The note for that register mentions ONLY P4.4.

Question is -- when that bit in ENAIO2 is set to enable DAC -- does it come shooting out on any of these other pins? There is no selection I can find in the ADC regs that defers pins
to the DAC function.. Are there ALTERNATE pins for DAC other than P4.4 -- or should I ignore all those notes about "sharing with ADCX-0 ???

Outcomes