Content originally posted in LPCWare by wmues on Mon Sep 15 12:51:01 MST 2014
There a 2 issues with I2C and these "modern" DACs....
1) These DACs are missing a spike filter. Short spikes on the lines (if the line is HIGH and has a HIGH impedance) will be received as a valid clock signal.
2) For the ACK, the codec will drive the line. If the codec output impedance is low, the dV/dt on the I2C data line is high. If you have routed the CLK and the DATA line in parallel, the ACK signal on the data line will produce a spike on the CLOCK line -> see 1)
What to do?
A) use a PUSH/PULL driver for the CLOCK line. If this is not possible with the LPC, add a buffer (tiny logiv, LVC) to the CLOCK line, so that the lock line has a low impedance.
B) Separate the CLOCK and the DATA line in your layout.
C) Detect the missing ACK per Software and implement a I2C reset:
- switch the I2C pins to GPIO
- Set the DATA line to Input
- Toggle the CLOCK line with 400KHz
- Repeat toggling the clock line until there a N clock with DATA = 1
- N = longest number of bits in the codec command sequence.
- Send a STOP
- reset the I2C controller in the LPC and switch the Pins back to I2C mode.
Been there, done that.
regards
Wolfgang