LPC1850EVA RevA4 hitex SDRAM @ 120Mhz

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LPC1850EVA RevA4 hitex SDRAM @ 120Mhz

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by benravin on Wed Apr 04 02:34:45 MST 2012
Hi,

We are  facing an issue with SDRAM(IS42S16400F) on Hitex board LPC1850EVA-A4. If  run with 72MHz clock then  data write/read from SDRAM is correct. But If  increased to 120MHz the data write/ read is not correct.

The clock is increased to 120MHz by setting the PLL1 using API  “CGU_SetPLL1(10)”  in CGU_Init() function.

Please help in resolving this issue.

Tools:
Red Suite:
Version: Red Suite v4.2.0 [Build 349] [25/02/2012]

Regards,
Biju
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by PhilYoung on Wed Apr 04 13:22:44 MST 2012
presumably you did the PLL update before setting up the SDRAM controller, since the example setup code uses the current operating frequency to compute the timing parameters for the SDRAM interface.
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