lpcware

LPC1857 external clock based timer interrupt generation

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by Nikhil Durlabhjibhai Dhameliya on Fri Jun 03 02:16:25 MST 2016
Hi Sir,

I want to generate interrupt on every rising edge of the PCLK signal [CAP1.1 pin] using  timer1 as counter mode.
My PCLK clock frequency is 22.5MHz but it is not generating timer interrupt.
My settings for Timer are below:

       Chip_SCU_PinMuxSet(0x5, 1, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC5));//P5_1 pin

Chip_Clock_EnableOpts(CLK_MX_TIMER1, true, true, 1);

LPC_TIMER1->CTCR = 5;//Counter Mode Rising / CAP1.1
LPC_TIMER1->PR = 0 ;//no Prescaler
LPC_TIMER1->MR[0] = 1 ;
LPC_TIMER1->MCR = 3;//on match reset counter + interrupt
LPC_TIMER1->EMR = 0;
NVIC_SetPriority( TIMER1_IRQn, 14);
NVIC_EnableIRQ(TIMER1_IRQn);
LPC_TIMER1->TCR = 3;//Reset counter
LPC_TIMER1->TCR = 1;
Kindly give any suggestion.

Outcomes