Settings to link application to second flash bank

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Settings to link application to second flash bank

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Fri Oct 17 10:54:56 MST 2014
I'm using the LPC1857 chip.
I'm working out how to do a field software upgrade and was thinking about putting a simple loader in the second bank that can receive the update over USB and program the first bank.

Is there a simple way to tell the linker to use the second bank or do I need to edit the linker script and change all the references to MFlashA512 to MFlashB512?  Or is there a checkbox somewhere to switch it?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Thu Oct 23 12:16:53 MST 2014
I haven't tried the newer version of LPCxpresso IDE yet, but it appears this problem has to do with resetting the LPC1857 rather than the tools.  I can do the following outside of the debugger and get similar results:

I am running a loader program in bank B.  I send a binary of an application to the loader, which erases and programs bank A.  At the end, it calls Chip_IAP_SetBootFlashBank to validate bank A (and invalidate bank B), then calls NVIC_SystemReset.  The chip does reset, but then runs from bank B.  If I press the reset button (pull chip reset pin low), then it runs bank A (actually, it doesn't really run, probably due to not setting vectors correctly, but that's another story).

So it seems that reset through the debugger or reset via NVIC_SystemReset does not really go through the full boot process to check if the flash is valid.  It looks as if it just jumps back to the start of code.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Tue Oct 21 02:48:10 MST 2014
I've tried replicating your problem here today, and can't find any problems using the current LPCXpresso 7.4.0 together with projects created as modified versions of the periph_blinky project in the current LPCOpen v2.12 packages for LPC18xx. Using two projects, one built for each flash bank, and each of which blink a different LED, I can quite happily debug one then the other, and see the appropriate LED blinking when I debug each image.

From your map file / debug log, I can see that you are using an older release of LPCXpresso (v7.1.1).

http://www.lpcware.com/content/forum/lpcxpresso-latest-release

I think your next step should be to try the current release (v7.4.0). I would suggest creating a new workspace and importing your codebase across, as per…

http://www.lpcware.com/content/faq/lpcxpresso/migrating-existing-projects

You might also want to check out what version of LPCopen you are using.

The only other thing I can think of is to check out whether your codebase is setting the VTOR register up correctly.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Mon Oct 20 13:28:05 MST 2014
The map file is attached.  When the debug launches, in the source window it says: "No source available for "0x1a000656" ", which is in the wrong bank. 

Debug messages:

LPCXpresso RedlinkMulti Driver v7.1 (Apr  1 2014 09:29:42 - crt_emu_cm_redlink build 73)
Found chip XML file in D:/Dev/Zephyr/uC/ZLoader1/Debug/LPC1857.xml
Emu(0): Conn&Reset. DpID: 2BA01477. CpuID: 410FC230. Info: (null)
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Loaded LPC18x7_43x7_2x512_BootB.cfx: LPC18x7/LPC43x7 Flash 2x512KB @0x1A000000 (Boot Bank B) Jul 22 2013 10:38:26  On-chip Flash Memory
Connected: was_reset=false. was_stopped=false
v LPCXpresso Free License - Download limit is 256K
Writing 19864 bytes to 1B000000 in Flash (assumed clock: unknown)
Erased/Wrote page  15-17 with 19864 bytes in 2189msec
Flash write Done
Stopped (Was Reset)  [Reset from Unknown]
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Mon Oct 20 13:05:30 MST 2014
So as I have previously requested…


Quote:
Please post the .map file generated by the linker (normally inside the Debug or Release directory) and also the debug log from when you launched your debug session.



Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Mon Oct 20 10:49:22 MST 2014
It seems to be more of a debugger issue.

If I'm running a program in bank A, then try to Debug a program built for bank B, it loads the program but then tries to debug the wrong bank, executing in bank A.  If I quit the debug, and press the reset button on the board, it starts running bank B, so obviously bank A was invalidated.  If I then run the debugger again, it will correctly debug bank B.

It seems that the debugger will try to debug in the last running bank, rather that in the current valid bank.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Mon Oct 20 01:41:14 MST 2014

Quote: MX21
it still appears to run the previous program from the first flash bank.  Should the flash algorithm invalidate bank A?



Yes, you need to somehow invalidate the vector table in flash bank A, see UM10503 5.3.1 Boot process for parts with internal flash.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Sat Oct 18 03:50:30 MST 2014
Yes, using the '…BootB.cfx' flash drivers should configure the MCU to run from the Bank B flash.

Please post the .map file generated by the linker (normally inside the Debug or Release directory) and also the debug log from when you launched your debug session.

http://www.lpcware.com/content/faq/lpcxpresso/debug-log

This should confirm the details of how you image has been built and what was programmed, and where, when your debug session is starting. Hopefully this should be enough to show what the problem is.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Fri Oct 17 16:30:52 MST 2014
I changed it to use the LPC18x7_43x7_2x512_BootB.cfx flash programming, but when I attempt to debug over LPC-Link2 (RedLink?), it still appears to run the previous program from the first flash bank.  Should the flash algorithm invalidate bank A?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Fri Oct 17 14:38:54 MST 2014

Quote: MX21

Nevermind.  I see what you mean now.  Just move the line with MFlashB512 up above the line with MFlashA512 and it will use Bank B.

Thanks



You will probably also want to change the flash driver associated with your project, so that the MCU is configured to boot from bank B. For more details please see:

http://www.lpcware.com/content/faq/lpcxpresso/lpc18-lpc43-internal-flash-drivers

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Fri Oct 17 14:00:00 MST 2014
That is correct. Now code will go into bankB (0x1B000000)
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MX21 on Fri Oct 17 11:22:35 MST 2014
So are you saying to swap the names in the memory configuration editor so that MFlashB512=0x1A000000 and MFlashA512=0x1B000000?

Nevermind.  I see what you mean now.  Just move the line with MFlashB512 up above the line with MFlashA512 and it will use Bank B.

Thanks
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Fri Oct 17 11:04:38 MST 2014
Use the memory configuration editor and switch the order of the flash, so bank b is first. IIRC, the editor is described in the user manual
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