LPC18xx SPI/SSP inter-byte timing

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by MX21 on Mon Feb 08 13:33:59 MST 2016
I can't find any spec as to what the inter-byte timing will be for a given clock speed for SPI.  All the datasheet shows is the relationship between the clock edges and the bits.  I have a peripheral that specifies a minimum time between bytes. 

How can I determine the inter-byte timing for the LPC18xx SPI peripheral?
Is there any way to control that timing?  I'm using DMA transfers.

For now I'm using interrupt mode so that I can manually insert the timing between bytes, but I'd rather not have to handle each byte individually.