lpcware

Issue of execution speed in EMC memory

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Oct 12, 2018 by Priyank Bhatt
Content originally posted in LPCWare by hostlin on Wed Feb 06 06:04:05 MST 2013
Hi all,
Please kindly help to check this issue.

I wrote a simple code to test the execution speed in internal RAM, external Flash, and external SRAM of LPC1850.
Just toggle the GPIO output to generate the square wave and measure the period. The result is listed below:

Platform : LPC1850
EMC Bus : CS0 16-bit NOR Flash (S29GL06490N, access time=90ns)
          CS1 16-bit SRAM (CY62187EV30LL, access time=60ns)
          (Due to limitation of customized design, it's unable to implement 32-bit data bus.)
Compiler : IAR EWARM
BASE_M3_CLK = 72 MHz (XOSC=12MHz, PLL1=6)
EMC_M3_CLK = 72 MHz
EMC_CLK_DIV = 0 (not divided. CREG6 is not configured, keeps default value after reset)
EMCControl = 0x00000001
EMCStaticConfig0 = 0x00080001    //16-bit, buffer=enable. Page mode=disable (not supported by S29GL06490N). Extended wait=disable
EMCStaticWaitWen0 = 0x00000000   //CS0 to write enable delay = 0
EMCStaticWaitOen0 = 0x00000000   //CS0 to output enable delay = 0
EMCStaticWaitRd0 = 0x00000007    //CS0 to read access delay = 7 clock cycles
EMCStaticWaitWr0 = 0x0000001F    //CS0 to write access delay = 31 clock cycle (default after reset. The test is only related to read access.)
EMCStaticWaitTurn0 = 0x00000001  //Bus turn around cycles = 1

Compiler optimization = Disable.
measured pulse period = (1) 2.45 us    executed in internal RAM
                        (2) 21.2 us                SRAM via EMC.........8.6 times of (1)
                        (3) 28.5 us                NOR Flash via EMC.....11 times of (1)
The code execution speed in EMC memory is incredibly slow.
A simple GPIO action takes almost 30 us is definitly unacceptable.
Is the result reasonable? Any problems of the settings?

Thanks,
Willie Lin

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