lpcware

LPC1812 - can't program

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by robertpalmerjr on Thu May 15 15:18:43 MST 2014
Has anyone used the LPC1812 part with LPCXpresso or FlashMagic?

I've spent a couple of days now trying to read and program brand new LPC1812 (two of them actually - both give same results).  I believe it is a documentation/silicon error.  Here are my experiments:

This is a custom board with a 12Mhz LPC1812 part on it.  I have the ISP accessible.

Starting with a brand new part...

TEST #1
Enabling ISP and using FlashMagic:
CRP shows Level 1
Device ID is correctly read and returns the correct value
all other commands (including complete erase) FAIL

TEST #2
Enable ISP and using a Terminal (arrows are informational only):
--> ?
<-- Synchronized
--> Synchronized
<-- OK
--> 12000
<-- OK
--> U 23130
<-- 0
--> P 0 14 0     <-- prepare sectors 0-14 in bank 0 (supposed to be Bank A)
<-- 7                <-- invalid sector
--> P 0 14 1     <-- prepare sectors 0-14 in bank 1 (supposed to be Bank B, but 1812 doesn't have Bank B)
<-- 0                <-- success
--> E 0 14 1
<-- 0

Further...
R 436208380 4   <-- this is address 0x1A0002FC (CRP address for BANK A)
1                        <-- Error Invalid Command
R 452985596 4   <-- this is address 0x1B0002FC (CRP address for BANK B)
0                        <-- success and the uuencoded data below is FF FF FF FF
$________
1020

Based on this testing, I would say that either the 1812 ONLY has Bank B, (data sheet says ONLY BANK A) OR the ISP for this part is using the wrong number to access Bank A (1 instead of the documented 0).

Bottom line is that both LPCXpresso and FlashMagic seem to be using '0' for the bank number which of course fails.  Is there an quick way I can modify one of the connection scripts/programming scripts for LPCXpresso to test this theory?  I have already tried just modifying the FLASH base address in the memory configuration for the part.  While that does correctly fix the linker output, it doesn't seem to have any effect on the SWD connection scripts or flash programming process.  I still get:

Found chip XML file in /Volumes/.../Debug/LPC1812.xml
(  5) Remote configuration complete
( 15) nSRST assert (if available)
Failed on connect: Ep(01). Target marked as not debuggable.
Connected. Was: None. DpID:     EDB6. Info: FTWN9IJGA

Outcomes