lpcware

SCT camera interface design with LPC1800-AN11365 DATA[Port C0 to C7 8bit] MISSING ON SDRAM WRITE

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Mar 2, 2018 by yuan East
Content originally posted in LPCWare by Nikhil Durlabhjibhai Dhameliya on Mon May 30 06:24:38 MST 2016
Hi sir,

I would kindly ask for your help concerning a problem on interfacing between the MCB1800 board (LPC1857 single core) and the cam OV7670.
I'm working on application "SCT camera interface design with LPC1800 and LPC4300" (AN11365). Below the link where you can download the orignal firmware:

http://www.lpcware.com/content/nxpfile/an11365-sct-camera-interface-design-lpc1800-and-lpc4300

This is Keil project.I have ported this code in LPCXpresso and made some modification in existing code.
->I have removed I2C interface with Camera for READ and Write to SDRAM.Instead i have used FPGA board that works as Camera and directly gives Vsync,HSync and PCLK signals.
My configuration are:
Active_Pixels_Per_Line ==> 3520
Active_Lines_Per_Image ==> 2000
Clock = 45MHz = 22.22 nS          
->I have attached capture image for all the signals.Data signal is provided to 8 GPIO pins starting from 0 to 255 continuously.

ISSUE: One line of Data written to SDRAM at each DMA request for PCLK rise signal.
But when i read SDRAM after one line data is completed(HSync goes low from High) then data found missing.
kindly check image "Data_READ_SDRAM.png" file for data write on SDRAM.It shows that after 0 on  0x28000500 ram location,directly 2 is written on next ram location  0x28000501.so 1 is missed.

SCT_FRQ: 180000000Hz
DMA_FRQ: 180000000Hz
EMC_FRQ: 90000000Hz

Kindly give any idea or suggestion for solving this issue.

Attachments

Outcomes