lpcware

Eeprom 17xx

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by wella-tabor on Fri Oct 25 00:47:03 MST 2013
Hello,

could someone help me to clarify some ideas about the EEPROM from the UM10470 LPC178x/7x User manual (Rev. 2.1 — 6 March 2013)?

There is stated:


Quote:
The 64-byte page register is the same size as a page in EEPROM memory. The 4,032 bytes EEPROM on most devices contains 63 pages. Devices with a 2 kB EEPROM provide 2,048 bytes on 32 pages.


OK, I got it, there is 63 pages * 64 bytes in page = 4,032


Quote:
11:0 ADDR EEPROM Address. Lower 6 bits are don't care.


    This does not match with my experiences. I am able to read byte e.g. from page 5, ofset 5 by programming the ADDR EEPROM Address to (5)<< 6 | 5.
The same for write with the exception that the offset should not be more than 0x3F ==> the page offset (0x3F << 6) must not change.
The only situation when the lower 6 bits are don't care is during the page erase/programm.

Lets summarize
The WRITE:
The upper bits of the ADDR EEPROM Address  are don't care. The lower 6 bits denotes the byte position in the page.

The READ:
The upper and lower bits of the ADDR EEPROM Address  are do care.

The ERASE/PROGRAM
Lower 6 bits are don't care. The upper 6 bits selects the page to which will be written the content of the buffer (previously filled with the WRITE).

REMARK
There is no need to read-modify-write the whole 64B buffer if you want to change e.g. only 5th byte. Just write byte to the address  ((x)<< 6) | 5 and then erase/program the address  ((x)<< 6).



Best
Martin








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