Content originally posted in LPCWare by IngmarBlonk on Thu Oct 25 09:06:07 MST 2012
Hi,
I'm using a LPC1778 combined with a ICS1894K-40LFT PHY on a custom PCB. It's possible to communicate over Ethernet, most of the time it works fine. However some packets sent from the LPC are dropped. In my test setup I've the LPC directly connected to a PC. When sending 10000 packets from the LPC to the PC only ~9700 packets are received on the PC side.
I've used several evaluation boards for the LPC17xx that worked correctly without dropping any frame. The only difference I see is the RMII/MII mode. All those evaluation boards have their PHY configured in RMII mode. The PHY on our board is configured in MII mode.
Measurements (attached) show that the Tx data lines are clocked out synchronous to the Rx clock instead of the Tx clock. The Rx data lines are clocked out synchronous to the Rx clock as they should be.
The attached file 'TxData RxCLK.png' shows a Tx data signal synchronous to the RxCLK.
The attached file 'TxData TxCLK.png' shows a Tx data signal that isn't in sync with the TxCLK also shown.
In MII mode there are two clock signals from the PHY to the LPC for each direction (Tx and Rx). In RMII mode there is only one clock signal from the LPC to the PHY for both direction. The single clock in RMII mode is the same pin as the Rx clock in MII mode. So it looks like the LPC doesn't correctly switch to MII mode.
Multiple people have looked into this issue. Code, schematics and datasheets have been checked multiple times.
Has anybody seen this problem before and/or knows what could be the cause?
Ingmar
