lpcware

LPC1778, SDRAM, & EMC - Basic questions & a possible board design problem

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by wheels on Wed Dec 02 16:33:32 MST 2015
I've been given a design for a proposed board using an LPC1778 and an AS4C4M16SA SDRAM chip. I've never used SDRAM before, so I'm having some problems figuring things out.

The first problem is that the SDRAM is 1Mx16x4 banks, which isn't listed in Table 133 of the EMC chapter of UM10470 as a supported configuration for address mapping. Does this mean that the SDRAM won't work at all? What happens if I configure the EMC for 4Mx16x4 banks? Will the device be mapped four times in the address space? I'm presuming that if that's possible, it's better than trying to configure for 1Mx16x2 banks, but I don't know.

Second, presuming I can actually use this SDRAM device, how do I determine the register values for the EMC? It has a bunch of programmable parameters (tRP, tAPR, tDAL, tRC, etc.), but the SDRAM's data sheet only gives me tCK3 (minimum clock cycle time), tAC3 (max access time from clock), tRAS (row active time), and tRC (row cycle time). Is it likely to work if I leave them all at their defaults?

Any help will be greatly appreciated.

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