lpcware

do FIOSET and FIOCLR need shared memory protection with RTOS

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by william.vh on Sun May 31 12:11:47 MST 2015
Using LPCXprersso IDE with LPC1769 and implementing freeRTOS..but reasonably new to RTOS and the concept of shared resources protection.
I am struggling to determine if FIOSET and FIOCLR need mutex protection if multiple tasks are toggling pins on the same port.

As simple pin set in C looks like this:

33        LPC_GPIO0->FIOSET = (1 << pin);

               0000113c:   movs r3, #1
               0000113e:   lsls r3, r0
               00001140:   ldr r2, [pc, #4]        ; (0x1148 <GPIO_0_on+12>)
               00001142:   str r3, [r2, #24]
               00001144:   bx lr
               00001146:   nop
               00001148:   stmia r0!, {}
               0000114a:   movs r0, #9


No two tasks use the same pin, but tasks do share the port.
I caught something on the logic analyzer (that I can't recreate) yesterday that can only be explained by a malfunctioning sensor or a shared resource issue. The sensor seems fine.

Do I need mutex protection for the FIOSET and FIOCLR registers?

Thanks in advance.
Billy

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