PLL0 input frequency range

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by Dragonheart77 on Sat Oct 05 00:16:57 MST 2013
Hi there,
I use the lpc1778 and the input frequency range for the PLL0 of the LPC17xx family is not clear to me.
The data sheet just tells me about a range of 10 to 25 MHz for PLL1. There is no such statement for PLL0. It just says "are functionally
identical but have somewhat different input possibilities and output connections". Is it the same input frequency range for PLL0 like PLL1?
For PPL1, mainly used for the USB clock, it sounds reasonable to allow 10 to 25 MHz and save something in the PLL block and silicon. Otherwise 2 different PLL blocks in silicon?
Also the source code of the "system_LPC177x_8x.c" says "F_in is in the range of 1 MHz to 25 MHz" as comment.
Currently I use an external 4 MHz oscillator. M = 30, P = 1 -> PLL Clk Out = 120 MHz, Fcco = 240 MHz OK. It works on 4 boards so far.
But does it always work in the temperature range?
I need the 4 MHz for other devices on my board and so I want to save parts and money. I'm not sure if the 4 MHz input is valid or not.
Thanks for your help.