lpcware

LPC1778 bootloader issues

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by wiggerssander on Wed Jan 02 03:48:00 MST 2013
Hello,

I'm trying to make a custom bootloader for my lpc1778 (rev E).
This bootloader will be uploaded using the NXP bootloader and then run from internal ram.

So far I got the bootloader to be uploaded and running from ram. The main program reads the part ID using the IAP commands. If the part is a lpc1778 then a led will be turned on.

Now I want to setup the pll's to run the program from external crystal on 120MHz. Therefore I need to set the CPU clock divider (CCLKSEL register) to 1.

Although I think that I follow the correct procedure to (dis)connect and setup the pll's this doesn't work for this setting. But if I set the CPU clock divider to 2 (60MHz) it works just fine.

Can somebody help me please!?
My code is shown below..

Kind regards,
Sander

Code:

/*************************** FUNCTION ************************************/
sint32 main(void)
/*************************** INFO ***************************************
**
** DESCRIPTION : Main Program Flash OS.
**
**               Read and process Flash OS command (received from uart).
**
** INPUT       :
**
** OUTPUT      :
**
** RETURN      :
**************************************************************************/

  IAP iap_entry;

  uint32 command[5] = {0, 0, 0, 0, 0};
  uint32 output[5]  = {0, 0, 0, 0, 0};

  init_lpc_system();

  init_io();
  set_led(OUTP_RED_LED, TRUE);
 
  iap_entry = (IAP)0x1FFF1FF1;
 
  command[0] = 54;
  iap_entry((uint32 *)command, (uint32 *)output);
 
  if((output[0] == 0        )&&
     (output[1] == 655966023)  )
  {
    set_led(OUTP_GREEN_LED, TRUE);
  }
  else
    set_led(OUTP_GREEN_LED, FALSE);

  while(TRUE);
}

/*************************** FUNCTION ************************************/
void init_lpc_system(void)
/*************************** INFO ****************************************
**
** DESCRIPTION : Initialise the cortex-m3 core, and clocks.
**
** INPUT       : none
**
** OUTPUT      : none
**
** RETURN      : none
**************************************************************************/
{
  /**************************** DISABLE ALL PLL'S ************************/
  sc->pboost    = 0x00000003;
  sc->flashcfg = FLASHCFG_REG_VAL;
 
  sc->clksrcsel = CLKSRCSEL_REG_VAL;    // set pll 0 clock source
 
  sc->cclksel     = 0x00000001;
  sc->usbclksel   = 0x00000000;
  sc->spificlksel = 0x00000000;
 
  sc->pll0con   = 0x00;                 // disable pll 0
  sc->pll0feed  = 0xAA;
  sc->pll0feed  = 0x55;
 
  sc->pll1con   = 0x00;                 // disable pll 1
  sc->pll1feed  = 0xAA;
  sc->pll1feed  = 0x55;
 
  /**************************** MAIN CLOCK *******************************/
  sc->scs = SCS_REG_VAL;                  // select clock range
 
  if((CLKSRCSEL_REG_VAL & CLK_SRC_SELECT_MASK) == CLK_SRC_MAIN)
  {
    sc->scs |= SCS_OSCEN;                 // enable main oscillator
   
    while((sc->scs & SCS_OSCSTAT) == 0) ; // wait for osc to stabilize
  }         

  /******************************* PLL 0 *********************************/
  sc->clksrcsel = CLKSRCSEL_REG_VAL;    // set pll 0 clock source
  sc->pll0cfg   = PLL0CFG_REG_VAL;      // set multiplier and divider bits
  sc->pll0con   = 0x01;                 // enable pll 0
  sc->pll0feed  = 0xAA;
  sc->pll0feed  = 0x55;
 
  sc->cclksel = 0x00000001;
 
  while(!(sc->pll0stat & PLL0STAT_PLOCK0)) ;// wait for pll to lock

  sc->cclksel  |= 0x00000100;
 
  sc->clkoutcfg = CLKOUTCFG_REG_VAL;
   
  if(CLKOUTCFG_REG_VAL & (0x00000001 << 8))
  {
    SET_GPIO_DIR_OUTPUT(127);
    SET_PINSEL(127, 4);
  }
}

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