LPC1768 FIFOLVL register

[lpcware]

Content originally posted in LPCWare by kiryat8 on Thu Jul 24 03:41:02 MST 2014
I am having a erratic UART1 problem that may mean that nothing is being sent by my algorithm.
I wanted to recheck my code and I opened the new user manual UM10360 Rev. 3.1 — 2 April 2014 and could not find the FIFOLVL that I use to check if I can insert more bytes into the uart.

I did find that statement that the register was removed!

UART0/1/2/3: FIFOLVL register removed.

I searched the forum and found this thread but I am not certain that it applies to the LPC1768 and the LPC1756, the two chips we use.

http://www.lpcware.com/content/forum/cant-get-uart-tx-fifo-to-work

I also check the errata pdf but found nothing.

Could anyone at NXP please write if I can safely read the FIFOLVL register reliably on the LPC1768 and the LPC1756.
Are there differences between code dies?

Thank you very much.
David Kaplan

[lpcware]

Content originally posted in LPCWare by kiryat8 on Sun Jul 27 00:17:48 MST 2014
OK I will remove using the UART FIFOLVL register from my code.
When I get a THRE interrupt, can I use THRE in U1LSR and be assured that it is '1' that I can write another 16 bytes to the U1THR register refilling the TX FIFO?
Thank You

[lpcware]

Content originally posted in LPCWare by embd02161991 on Fri Jul 25 13:57:00 MST 2014
Hi,

The UART FIFOLVL register does not work.  It is not reliable to read the register values and was thus removed from the user manual.


Thanks,
NXP Technical Support