lpcware

Unexpected DMA Behaviour with LPC1778

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by MikeSimmonds on Mon Jan 14 22:17:12 MST 2013
I'm using LPCXpresso 4.3 to debug (because I am not convinced of v5 stability yet) on WinXP Prof SP3 (32 bit)

When I initialise the DMA system (after reset), two of the DMA registers unexpectedly get values set as I write the
DMA enable bit (DMAConfig). (On an LPC1778 TQFP 208; custom PCB.)

Specifically, the SoftwareBurstReqest = 0x1440 and the SoftwareSingleReqest = 0x40.
Code shown below -- Sorry "C" people; I write my support code in asm and I don't like CMSIS.
Before the last init step the debugger shows zeros for all the DMA registers, after the two register are
set as show above (and the config register is 0x01). The 3 regs are highlighted yellow for change.

Can anyone explain what is happening/why this occurs?
See also my thread "Unexpected DMA Behaviour with LPC1778 Two".

Mike

<code>
;-----------------------------------------------------------------------!
; Init DMA                                !
;-----------------------------------------------------------------------!

fn InitDMA

    push    {lr}            ; save regs
    movs    r0, pDMA        ; enable peripheral clock
    bl    PowerOn            ;

    ldr    r3, =dmaBase        ; dma base

    movs    r0, 0            ;
    adds    r1, r3, dmaOffset+dmaCfg; channel[0].cfg
    str    r0, [r1], 0x20        ; reset first channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset next  channel
    str    r0, [r1], 0x20        ; reset last  channel

    movs    r0, 0xFF        ; clear any interrupt flags
    str    r0, [r3, dmaTcClr]    ; terminal counts
    str    r0, [r3, dmaErrClr]    ; errors
    movs    r0, (1<<0)+(0<<1);    ; enable DMA, little endian
    str    r0, [r3, dmaConfig]    ;

    movs    r0,  vDMA        ; DMA interrupt handler
    ldr    r1, =SioDmaHandler    ;
    movs    r2,  dmaPriority    ;
    bl    SetHandler        ;

    movs    r0, bfBase        ; to aid debugging
    movs    r1, 0            ;
    movs    r2, 5*bfSz        ;
    bl    memset            ;
    pop    {pc}            ; return

fe InitDMA
</code>

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