Understanding timer interval values for match register

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by micro9000 on Fri Aug 09 23:26:28 MST 2013
Hey guys I could use some help understanding the timer example provided. I am using the LPC1764 running at 100MHz and using LPCXpresso 5.2.6.

In the LPCX176x_cmsis2_timers example I see the following code:

#define TIMER0_INTERVAL((2 * (4 *(SystemCoreClock/10))) - 1)
#define TIMER1_INTERVAL((2 *(4 *(SystemCoreClock/10))/3) - 1)
#define TIMER2_INTERVAL((2 *(4 *(SystemCoreClock/10))/5) - 1)
#define TIMER3_INTERVAL((2 *(4 *(SystemCoreClock/10))/7) - 1)

My question is how are these values calculated. For instance:

(2*4*100MHz)-1 => ~800x10^6 or 800 million. Is this 8 seconds? Also, why is the 2*4 necessary? If someone could explain to me the calculation of the intervals and how the match register will use this value it would be much appreciated.