SDRam and Nandflash problem

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SDRam and Nandflash problem

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by shuailingsuper on Mon Jul 02 20:27:48 MST 2012
Hi everybody:
   I use mcu -lpc1788FBD208,SDRam -HY57V641620,Nandflash -K9F1G08U0C .
   Now I used alone SDram access data no problem , and used alone NandFlash access data no problem too . But I put the data in SDram to NandFlash, and then reads the data from the NandFlash to the SDram, the data will be part of the mistakes .
   120 MHz system working frequency And SDRam working frequency 60 MHz . This system of SDRam is used for the buffer of 640 * 480 LCD .
   SDRam configuration as follows : CAS Latency = 3 clk ; Burst Type = Sequential ; Burst Length = 8 ; OP Code = Burst Read and Burst Write.I use the following ways reading and writing Flash:

//bufPtr points to a certain position in SDRam
int NandFlash_ReadFromAddr(uint32_t addrInWholeNand, uint8_t* bufPtr, uint32_t size,uint8_t cs)
{
volatile uint8_t *pCLE;
volatile uint8_t *pALE;
volatile uint8_t *pDATA;
    uint8_t * bufEnd, *bufStart;
    uint32_t curColumm;

    bufStart =  bufPtr;

    switch(cs)
    {
        case 0:
        pCLE  = K9F1G_C0_CLE;
        pALE  = K9F1G_C0_ALE;
        pDATA = K9F1G_C0_DATA;
            break;
        case 1:
        pCLE  = K9F1G_C1_CLE;
        pALE  = K9F1G_C1_ALE;
        pDATA = K9F1G_C1_DATA;
            break;
        case 2:
        pCLE  = K9F1G_C2_CLE;
        pALE  = K9F1G_C2_ALE;
        pDATA = K9F1G_C2_DATA;
            break;
    }
   
    curColumm = addrInWholeNand % NANDFLASH_PAGE_FSIZE;

*pCLE = K9FXX_READ_1;

*pALE = (uint8_t)(addrInWholeNand & 0xFF);/* column address low */

*pALE = (uint8_t)(((addrInWholeNand>>8)&0x0F) );/* column address high */

*pALE = (uint8_t)((addrInWholeNand>>12)&0xFF);/* row address low */

*pALE = (uint8_t)((addrInWholeNand>>20)&0xFF);/* row address high */

*pCLE = K9FXX_READ_2;

NandFlash_WaitForReady();

if((curColumm+size)>(NANDFLASH_RW_PAGE_SIZE + NANDFLASH_SPARE_SIZE))//ÅжÏÊÇ·ñ³¬³öÁ˱¾Ò³µÄ·¶Î§
    {
        bufEnd = bufStart + NANDFLASH_PAGE_FSIZE - curColumm;
    }
    else
    {
        bufEnd = bufStart + size;
    }
    //Get data from the current address in the page til the end of the page
    while(bufPtr < bufEnd)
    {
        *bufPtr = *pDATA;
bufPtr++;
    }

// Ok, return
return (uint32_t)(bufEnd - bufStart);
}
//bufPtr points to a certain position int SDRam
Bool NandFlash_PageProgram( uint32_t pageNum, uint32_t blockNum, uint8_t *bufPtr ,uint8_t cs)
{
volatile uint8_t *pCLE;
volatile uint8_t *pALE;
volatile uint8_t *pDATA;
uint32_t i, curAddr, curColumm;

    switch(cs)
    {
        case 0:
        pCLE  = K9F1G_C0_CLE;
        pALE  = K9F1G_C0_ALE;
        pDATA = K9F1G_C0_DATA;
            break;
        case 1:
        pCLE  = K9F1G_C1_CLE;
        pALE  = K9F1G_C1_ALE;
        pDATA = K9F1G_C1_DATA;
            break;
        case 2:
        pCLE  = K9F1G_C2_CLE;
        pALE  = K9F1G_C2_ALE;
        pDATA = K9F1G_C2_DATA;
            break;
    }

curAddr = NANDFLASH_BASE_ADDR + blockNum * NANDFLASH_BLOCK_FSIZE
+ pageNum * NANDFLASH_PAGE_FSIZE;

curColumm = curAddr % NANDFLASH_PAGE_FSIZE;
curAddr -= curColumm;

*pCLE = K9FXX_BLOCK_PROGRAM_1;

*pALE =  (uint8_t)(curColumm & 0x000000FF);/* column address low */

*pALE = (uint8_t)((curColumm & 0x00000F00) >> 8);/* column address high */
   
    *pALE = (uint8_t)((curAddr>>12)&0xFF);/* row address low */

*pALE = (uint8_t)((curAddr>>20)&0xFF);/* row address high */

//Not write to spare area for the NandFlash valid block checking
for ( i = 0; i < NANDFLASH_RW_PAGE_SIZE; i++ )
{
*pDATA = *bufPtr++;
}

*pCLE = K9FXX_BLOCK_PROGRAM_2;

NandFlash_WaitForReady();

return( NandFlash_ReadStatus( K9FXX_BLOCK_PROGRAM_1 ,cs) );
}

Thank's in advance for your help
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339 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lgc1980 on Thu Sep 06 06:17:53 MST 2012
i met the same problem.You solve this problem?
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