Required SWD pins

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by jdupre on Tue Jun 30 13:33:01 MST 2015
On my LPC1769 Xpresso board I have disconnected JTAG_SWO, JTAG_TDI and JTAG_RESET by removing the solder bridges at J4.

Within the LPCXpresso/LPC-Link environment, debugging appears to operate normally without those connections. (Despite the manual saying that the 17xx boots in JTAG mode.)


1) In what cases would SWO be used?  Is this just for very low level debugging of the CM3 core?

2) Is hardware reset control only required for JTAG debugging and not SWD debugging?  When might the LPC-Link SWD interface need to trigger hardware reset on the target?

- Joe