Content originally posted in LPCWare by MikeSimmonds on Thu Mar 19 10:36:33 MST 2015
We had an issue with LAN8270A (on a custom 1778 board)
Following Various EA and other schematics, we connected the chip reset out to the PHY reset (in) pin.
Sound reasonable yes.
BUT ...
The observed duration of the reset out pulse was on the order of 1 to 2 micro seconds; the 8270 data
sheet has a minumum reset duration of way way more than that (I can't remember the exact figure and
I am too lazy to find and open the datasheet). I was going to (and we actually did) re-route the PHY reset
to a GPIO to give me control of the PHY reset period.
On the current board, I just cut the track and that seened to do the trick. And I did not actually program
or use the GPIO pin on the re-spin.
One other thing, it may be better to set a break several steps after the failing line and let it run
through.
One last thing, we had an early problem with the 25MHz clock in to the PHY (bad capacitor), and
(there is a tiny note in the UM) if that clock is missing it will kill the debugger when setting up the EMAC.
Some of this may help, cheers Mike