SPI Mode 0 and 3 16bit array sending Problem

[lpcware]

Content originally posted in LPCWare by DAMEK on Thu Jun 26 12:12:18 MST 2014
Hey team,

i worked out some interessting things about the SPI TX transfer.

settings are:
- delays = none
- clockdiv = 2 till 8 (i did not more)
- Transfermode = polling

first i used mode 3 but my slave don't want to start working.. in fact of that, i used the nice nxp labtool to get some details.

[img=1587 x 313]http://s14.directupload.net/images/140626/efbl5pbd.jpg[/img]

So I've been thinking about my rtos implementation and then at the EOF function. Disabling this functions will give the same result, so I tried mode 1 and 2.

mode 1 and 2 (CPHA not equal CPLO) works fine (picture below measured with NXP labtool)

[img=1584 x 287]http://s14.directupload.net/images/140626/mih7un6n.jpg[/img]

Why does the unwanted chip select toggling on only in mode 0 and 3? Can this be due to the OEM board or to the internal pullups?

Greetings and thanks for the working

[lpcware]

Content originally posted in LPCWare by DAMEK on Mon Jun 30 16:04:48 MST 2014
Hey Wolfgang,

currently the transfer runs without DMA and i must sync my cpld for the high transfer frequency (CDC)..

i give my best to stay in time and post my results! give me some time, because of Masters Degree tests in 3 weeks.

sry

[lpcware]

Content originally posted in LPCWare by wmues on Fri Jun 27 12:11:00 MST 2014
Can you be sure that the DMA can do the transfer in time?

There might be another DMA channel running in the system....

I have a system with LPC1788 and LCD DMA, and choose not to rely on SPI DMA to come in time 100%.

regards
Wolfgang

[lpcware]

Content originally posted in LPCWare by DAMEK on Fri Jun 27 05:19:11 MST 2014
thanks for your answer!

i play a little bit with the settings and the dma feature on the weekend and post my result.

Have a nice weekend :)

[lpcware]

Content originally posted in LPCWare by wmues on Fri Jun 27 02:14:20 MST 2014
If you use automatic chip select, chip select WILL toggle between 2 bytes. Imagine if you get an interrupt while polling for the next byte!

The only solution to have chip select active during the whole transfer is: set/clear the chip select by hand, using the GPIO functions.

regards
Wolfgang