lpcware

SPI Mode 0 and 3 16bit array sending Problem

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by DAMEK on Thu Jun 26 12:12:18 MST 2014
Hey team,

i worked out some interessting things about the SPI TX transfer.

settings are:
- delays = none
- clockdiv = 2 till 8 (i did not more)
- Transfermode = polling

first i used mode 3 but my slave don't want to start working.. in fact of that, i used the nice nxp labtool to get some details.

[img=1587 x 313]http://s14.directupload.net/images/140626/efbl5pbd.jpg[/img]

So I've been thinking about my rtos implementation and then at the EOF function. Disabling this functions will give the same result, so I tried mode 1 and 2.

mode 1 and 2 (CPHA not equal CPLO) works fine (picture below measured with NXP labtool)

[img=1584 x 287]http://s14.directupload.net/images/140626/mih7un6n.jpg[/img]

Why does the unwanted chip select toggling on only in mode 0 and 3? Can this be due to the OEM board or to the internal pullups?

Greetings and thanks for the working

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