lpcware

Bugs in AN11538?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by 1234567890 on Wed Oct 29 13:24:07 MST 2014
As a new proud owner of a LPCXPpresso LPC1549 with SCT (which I've never heard before) I started to read the related section in the UM. After a few sentences I was scared about this peripheral and stopped reading. I decided to look for a special article and found AN11538.
I just flew over the example code and was scared again: Is this peripheral really that complicated or are there a few bugs in the AN? I haven't checked any registers in the UM, but

Fig 2:
LPC_SCT->MATCHREL[0].U = SystemCoreClock/100;// match 0 @ 100 Hz = 10 msec
=> all the other examples have -1 behind

Fig 4:
LPC_SCT->OUT[0].SET = (1 << 0); // event 0 will set SCT_OUT0
LPC_SCT->OUT[0].CLR = (1 << 1); // event 0 will clear SCT_OUT0
=> all the other examples have the same bits in SET and CLR

Fig  6:
LPC_SCT->EVENT[0].STATE = 0xFFFF; // event 0 happens in all state
=> all the other examples have 0xFFFFFFFF for all states

and so on. So are this bugs or is it really not logical (at least for me at the first and veeeery quick view)?

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