pwm pin and reset problem

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by enrico cortelazzo on Wed Mar 25 02:33:33 MST 2015
I have a problem with PWM pin during reset:
at start-up all the pins are in high impedence input state with pull-up inside and for this reason I configure my PWM as "active low" in my board.
I configure SCT_OUT pin for drive an inverter and use two events/state, the first for drive low the pin and the second to reset pin high. It works fine, but now I have this trouble:
if it happens a reset condition all the register about the SCT timers go to its reset condition and my output pin goes in low state, but switch matrix is not involved in this kind of reset so my pin remains low and the inverter hardware is on, in a dangerous condition.
Pratically there are two different condition for output pwm at reset state: high state at start-up reset and low state for other reset (wcd for example).
Someone has a suggestion for solving this trouble?