LPC1549 WWDT not running [SOLVED]

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by EtaPhi on Fri Feb 20 06:24:19 MST 2015

I'm extending NXP IEC60335 library, because it doesn't check if WWDT is working and because some other security tests are missing (eg DMA controller test).

My code is simple.

After Cortex M3 registers test are passed, I look at SYSRSTSTAT register to find the reset source.

If WWDT forced a reset, a "magic number", which is stored in RAM, allows to tell a WWDT diagnostic reset from an unexpected one, so that the right action is taken.

If a Power-On, System or External reset restarted the core, WWDT dignostic code is executed.
This code sets bit 22 of SYSAHBCLKCTRL0 to feed the clock to WWDT bus interface.
Then bit 20 of PDRUNCFG is cleared to enable WDTOSC.
WWDT is then activated by storing 0x21 = WDEN + WDLOCK in WDMOD register.
About 100 clock cycles are then wasted to wait at least 3 WDCLK cycles (the core is running @ 12 MHz; WDTOSC frequency should be 504 kHz) so that changes to WDMOD register may take effect.
My code then sends the sequence 0xAA 0x55 to the FEED register to start WWDT.
It finally reads WWDT TV register to check if WWDT started, but its value is always 0xFF.
Since there is a delay of 6 WDCLK cycles between two reads, I suppose that WDTOSC isn't running.

Why is WDTOSC not running?

If this behavoiur happens only during debug, how can I test my code?