After setting ADC divider in Chip_ADC_SetClockRate, there's a calibration done...
Chip_ADC_StartCalibration(LPC_ADC0);
... and [color=#f00]this calibration is setting ADC clock to 500kHz[/color]
So ADC is 72 times slower than expected: 0.7us * 72 = 50 us, which is measured with DWT... [color=#090] Solution: Set ADC clock after calibration [/color]
Note: LPCOpen sample periph_adc_rom is calibrating before ADC clock setup...