Wrong LPCOpen ADC Init

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by R2D2 on Fri Dec 05 23:17:25 MST 2014
LPCOpen sample: periph_adc is converting incredible slow  :((

More than 50us for a single conversion  :quest:

Init is showing:

/** Maximum sample rate in Hz (12-bit conversions) */
#define ADC_MAX_SAMPLE_RATE 50000000


So a 72MHz board should convert with 36MHz and a single conversion should cost me 25 cycles:

That's 25*1/36E6 = [color=#f00]700ns[/color]

What's wrong here?

BTW: This problem isn't new, see http://www.lpcware.com/content/forum/slow-adc-conversion-xpresso-board

The answer is simple:

After setting ADC divider in Chip_ADC_SetClockRate, there's a calibration done...


... and [color=#f00]this calibration is setting ADC clock to 500kHz[/color] :O

So ADC is 72 times slower than expected: 0.7us * 72 = 50 us, which is measured with DWT...
Solution: Set ADC clock after calibration  :)

Note: LPCOpen sample periph_adc_rom is calibrating before ADC clock setup...