Wrong LPCOpen ADC Init

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Wrong LPCOpen ADC Init

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Fri Dec 05 23:17:25 MST 2014
LPCOpen sample: periph_adc is converting incredible slow  :((

More than 50us for a single conversion  :quest:

Init is showing:

/** Maximum sample rate in Hz (12-bit conversions) */
#define ADC_MAX_SAMPLE_RATE 50000000

Chip_ADC_SetClockRate(LPC_ADC0, ADC_MAX_SAMPLE_RATE);


So a 72MHz board should convert with 36MHz and a single conversion should cost me 25 cycles:

That's 25*1/36E6 = [color=#f00]700ns[/color]

What's wrong here?

BTW: This problem isn't new, see http://www.lpcware.com/content/forum/slow-adc-conversion-xpresso-board

The answer is simple:

After setting ADC divider in Chip_ADC_SetClockRate, there's a calibration done...
Chip_ADC_StartCalibration(LPC_ADC0);

... and [color=#f00]this calibration is setting ADC clock to 500kHz[/color]

So ADC is 72 times slower than expected: 0.7us * 72 = 50 us, which is measured with DWT...
[color=#090]
Solution: Set ADC clock after calibration 
[/color]

Note: LPCOpen sample periph_adc_rom is calibrating before ADC clock setup...






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530 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Wed Dec 10 08:30:31 MST 2014
Hi R2D2,

Thank you for finding this issue. This will be looked into and reported to the software team. :)
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