ADC Channel 0, 1 crosstalk?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by tomg on Tue Apr 26 06:21:21 MST 2016
I'm narrowed a bug down to a LPCxpresso V2 demo board with connected trimmers to provide analog signal to channel 0 and 1. I'm seeing some "crosstalk"(?) between channels:

Sampling frequncy set to max (Chip_ADC_SetClockRate(LPC_ADC0, ADC_MAX_SAMPLE_RATE);)
Channel 1 set to ~ vref/2 (2029)
This is done, while Channel 0 is at ~ max (4094)
If Channel 0 set to ~ 0, Channel 1 value will become 1675
So I'm seeing an offset of 354 lsb on Channel 1, if Channel 0 changes full range.

if Channel 1 is set to ~ 0, the offset will be 179 and if Channel 1 is set to ~ max, the offset is 206. These offsets are quiet stable/reproduceable.

I checked input values with a scope and they were stable.

If Sampling frequency set to 1/4 * max (Chip_ADC_SetClockRate(LPC_ADC0, ADC_MAX_SAMPLE_RATE / 4);) this doesn't occure anymore (on oversampling there is still about 0.875 lsb impact, but that's tolerable)

Is this some known issue with this chip, or am I unable to understand whats happening here:) ?