LPC1225 Deep Sleep problem

[lpcware]

Content originally posted in LPCWare by Redbull68 on Thu Mar 06 13:00:54 MST 2014
Hi everybody

I try to use the Deep Sleep mode for my LPC1225 controler and wake up from a signal on an external pin. I did like it say in the user manual UM10441 p.45 but i must did a little error because the controler don't exit the deep sleep mode.

The code is not the main problem because now i can't reprogram the controler with my jlink probe and IAR IDE.

Can it possible to brick the controller or someone have a idea to solve my problem ?

Thanks

[lpcware]

Content originally posted in LPCWare by rohit.bb on Thu Mar 27 02:42:59 MST 2014
hello bro,

I too faced this problem when working with lpc2387. I was unable to connect with my ULINK Programmer.
Then I erased the flash memory by using isp programming through uart 0 by asserting the ISP Pin.
And It worked. So try this.

Good Luck . :)

Regards ,
Rohit

[lpcware]

Content originally posted in LPCWare by Redbull68 on Fri Mar 07 03:31:21 MST 2014
It's OK.
I solved the problem with the ISP pin but I don't really know what i did. I send ISP command by UART but i didn't understand the answer from the controler and after I succed to reprogram the controler with jlink probe and ISP pin low.

[lpcware]

Content originally posted in LPCWare by Redbull68 on Fri Mar 07 00:31:08 MST 2014
Thanks for your help,
I read the user manuel and i know for the External RESET pin but when i try to program a new code with the jlink probe i don't arrive. I will try with the ISP pin but after pulling this pin low, MUST i do something or the chip will erase automatically ?

[lpcware]

Content originally posted in LPCWare by embd02161991 on Thu Mar 06 17:57:08 MST 2014
Hi,

The microcontroller can wake up from Deep-sleep mode in the following ways:

• Signal on an external pin. For this purpose, pins PIO0_0 to PIO0_11 can be enabled  as inputs to the start logic. The start logic does not require any clocks and generates  the interrupt if enabled in the NVIC to wake up from Deep-sleep mode.

• RTC match interrupt for self-timed wake-up. The RTC interrupt must be enabled in the  start logic1 block.

• Reset from the BOD circuit. In this case, the BOD circuit must be enabled in the  PDSLEEPCFG register, and the BOD reset must be enabled in the BODCTRL  register (Table 32).

• Reset from the watchdog timer. In this case, the watchdog oscillator must be running  in Deep-sleep mode (see PDSLEEPCFG register), and the WDT must be enabled in  the SYSAHBCLKCTRL register.

• External RESET pin.

The above information is present in the user manual. If you did not program any of the pins or registers for an interrupt, then the external RESET pin should work.

If you still find that the chip is going into deep sleep mode after hitting the reset, then try pulling the ISP pin (P0_12) low while hitting reset to enter the ISP mode and erase the chip. This will definitely solve the problem.
Next time before entering the Deep Sleep mode or any of the low power modes , please program the interrupt sources to wake up the chip.

Thanks,

NXP Technical Support