USB0_PWR_FAULT polarity on the LPC1830 Explorer board

[lpcware]

Content originally posted in LPCWare by tvink on Thu Mar 19 08:39:51 MST 2015
Hi,

Any reason why there is a pull down resistor on the LPC18xx input signal "USB0_PWR_FAULT" on the LPC1830 explorer board?

Unless I am mistaken this will read always as a power fault since the LPC18xx USB0_PWR_FAULT input is active LOW and the LM3526-H has an open drain output.
I am using a pull up on mine.  Please let me know if I read this wrong.

Thanks

[lpcware]

Content originally posted in LPCWare by tvink on Fri Mar 20 07:42:28 MST 2015
Thanks,

I had misunderstood how the pull up and pull downs work in the SFSP registers.  I had thought PU/PD were only available when the pin is configured as a GPIO.  But I now see that the resistors are available for all of the functions.  Good to know!

Anyway, my question really is "what is the polarity of the USB_PWR_FAULT signal". ( Active high or active low ) The LPC users manual doesn't really say.  But the literature for the chip on the LPC1830 Explorer board says active LOW.  So I was happy with that until I noticed the schematic for the eval board.  Since they add a fairly strong pull down resistor I would expect the USB0 to always register a fault.  Maybe this is just a simple mistake in the schematic.  But if not I am backwards...  so I would like to know before I fab my board.

Thanks again...

[lpcware]

Content originally posted in LPCWare by serge on Fri Mar 20 02:53:46 MST 2015
If i am not mistaken this USB0_PWR_FAULT is connected to P2_1. This pin has an internal pull-up. So it depends on software if you need an external pull-up or down.