I2C timing

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by mklalos on Tue May 17 03:46:06 MST 2016
Hi all,

I'm using an LPC1920, this uC has 2 I2C interfaces, one is dedicated I2C compliant bus and the other uses standard I/O pins. The timing specs for both are the same but when using the I2C1 (the one using standard I/O) the SDA line change status exactly at the SCL line edge and that may produce and stop or restart condition. On the other hand, I2C0 change the status at while the SCL is low.

Is there a way to solve this? I couldn't find any register to configure this, just to configure the clock duty cycle which does not help on this issue.

I attach a pic showing the waveform.