IAP Flash Programming causing Hard fault

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IAP Flash Programming causing Hard fault

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lonwalker on Thu Oct 16 14:06:16 MST 2014
I have been chugging right along with my project and ran into a snag writing setup parameters within LPC824's Flash memory (sector 15) for my program to read on power-up.
I am using using the LPCWare periph_flashiap project sample code snippets to my code:

/* Last sector address */
#define START_ADDR_LAST_SECTOR  0x00003C00

/* Size of each sector */
#define SECTOR_SIZE             1024

/* LAST SECTOR */
#define IAP_LAST_SECTOR         15

/* Number of bytes to be written to the last sector */
#define IAP_NUM_BYTES_TO_WRITE  64

/* Number elements in array */
#define ARRAY_ELEMENTS          (IAP_NUM_BYTES_TO_WRITE / sizeof(uint32_t))

/* Initialize the array data to be written to FLASH */
for (i = 0; i < ARRAY_ELEMENTS; i++) {
src_iap_array_data = 0x11223340 + i;
}

/* Read Part Identification Number*/
part_id = Chip_IAP_ReadPID();
DEBUGOUT("Part ID is: %x\r\n", part_id);

/* Disable interrupt mode so it doesn't fire during FLASH updates */
__disable_irq();

/* IAP Flash programming */
/* Prepare to write/erase the last sector */
ret_code = Chip_IAP_PreSectorForReadWrite(IAP_LAST_SECTOR, IAP_LAST_SECTOR);

/* Error checking */
if (ret_code != IAP_CMD_SUCCESS) {
DEBUGOUT("Command failed to execute, return code is: %x\r\n", ret_code);
}

/* Erase the last sector */
ret_code = Chip_IAP_EraseSector(IAP_LAST_SECTOR, IAP_LAST_SECTOR);

/* Error checking */
if (ret_code != IAP_CMD_SUCCESS) {
DEBUGOUT("Command failed to execute, return code is: %x\r\n", ret_code);
}

/* Prepare to write/erase the last sector */
ret_code = Chip_IAP_PreSectorForReadWrite(IAP_LAST_SECTOR, IAP_LAST_SECTOR);

/* Error checking */
if (ret_code != IAP_CMD_SUCCESS) {
DEBUGOUT("Command failed to execute, return code is: %x\r\n", ret_code);
}

/* Write to the last sector */
ret_code = Chip_IAP_CopyRamToFlash(START_ADDR_LAST_SECTOR, src_iap_array_data, IAP_NUM_BYTES_TO_WRITE);

/* Error checking */
if (ret_code != IAP_CMD_SUCCESS) {
DEBUGOUT("Command failed to execute, return code is: %x\r\n", ret_code);
}

/* Re-enable interrupt mode */
__enable_irq();

----------------------
Everything executes fine until the Chip_IAP_EraseSector(IAP_LAST_SECTOR, IAP_LAST_SECTOR) function call; where Xpresso gets a HardFault_Handler call which ceases program execution.
I am just not quite sure how to debug what is causing this due to it is down inside the code embedded on the device itself.    I looked on LPCOpen forums and see that VECTPC register indicates a hint; my value is 0xFFFFFFFE which puts program counter clear up at the top of memory space?

I also see that the IAP uses the top 32 locations of RAM, so I adjusted the Top of stack to 0x10001f80, still no joy.


Any help or direction to what is going on and where to go/debug- is greatly appreciated.

Lon
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lonwalker on Thu Oct 16 15:41:46 MST 2014
Thanks man for the speedy reply.
I am working this issue hard,,,,, The sample program is working on the MAX824 board, but my application is not.    I am setting up the PIN Matrix of 824 and also have the following in top of C module since I am using Chip interface calls and not Board interface stuff----  (concerned that maybe the clock settings are not right):

const uint32_t OscRateIn = 12000000;
const uint32_t ExtRateIn = 0;


The rest of the App does this before the IAP Calls:
int main(void)
{
inti;
int qty;
boolflashMemoryWrite;
uint8_t ret_code;
uint32_t part_id;

    /* Generic Initialization */
    SystemCoreClockUpdate();

    /* Enable SysTick Timer */
    SysTick_Config(SystemCoreClock / TICKRATE_HZ);


    /* Initialize GPIO */
    Chip_GPIO_Init(LPC_GPIO_PORT);

//--------------------------------------------------------------
//    SwitchMatrix_Init();
//--------------------------------------------------------------
    /* Enable the clock to the Switch Matrix */
    Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);

    /* Pin Assign 8 bit Configuration */
    /* none */

#if 1

    /* Pin Assign 1 bit Configuration */
    LPC_SWM->PINENABLE0 = 0xfffffECFL;

//--------------------------------------------------------------
//    IOCON_Init();
//--------------------------------------------------------------
    /* Enable IOCON clock */
    Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);

    /* Pin I/O Configuration */
    LPC_IOCON->PIO0[0]= 0x90;
    LPC_IOCON->PIO0[1]= 0x90;
    LPC_IOCON->PIO0[2]= 0x90;
    LPC_IOCON->PIO0[3]= 0x90;
    LPC_IOCON->PIO0[4]= 0x90;
    LPC_IOCON->PIO0[5]= 0x90;
    LPC_IOCON->PIO0[6]= 0x90;
    LPC_IOCON->PIO0[7]= 0x90;
    LPC_IOCON->PIO0[8]= 0x90;
    LPC_IOCON->PIO0[9]= 0x90;
    LPC_IOCON->PIO0[10]= 0x90;
    LPC_IOCON->PIO0[11]= 0x90;
    LPC_IOCON->PIO0[12]= 0x90;
    LPC_IOCON->PIO0[13]= 0x90;
    LPC_IOCON->PIO0[14]= 0x90;
    LPC_IOCON->PIO0[15]= 0x90;
    LPC_IOCON->PIO0[16]= 0x90;
    LPC_IOCON->PIO0[17]= 0x90;

//    LPC_IOCON->PIO0[18]= 0x90;
    LPC_IOCON->PIO0[18]= 0x488;

    LPC_IOCON->PIO0[19]= 0x90;
    LPC_IOCON->PIO0[20]= 0x90;
    LPC_IOCON->PIO0[21]= 0x90;
    LPC_IOCON->PIO0[22]= 0x90;
    LPC_IOCON->PIO0[23]= 0x90;

    LPC_IOCON->PIO0[24]= 0x88;
    LPC_IOCON->PIO0[25]= 0x88;

    LPC_IOCON->PIO0[26]= 0x90;
    LPC_IOCON->PIO0[27]= 0x90;
    LPC_IOCON->PIO0[28]= 0x90;

//--------------------------------------------------------------
    //    InputMux_Init();
    //--------------------------------------------------------------
    LPC_INMUX->SCT0_INMUX[0] = 15;    /*  */
    LPC_INMUX->SCT0_INMUX[1] = 15;    /*  */
    LPC_INMUX->SCT0_INMUX[2] = 15;    /*  */
    LPC_INMUX->SCT0_INMUX[3] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[0] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[1] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[2] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[3] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[4] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[5] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[6] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[7] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[8] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[9] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[10] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[11] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[12] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[13] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[14] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[15] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[16] = 15;    /*  */
    LPC_DMATRIGMUX->DMA_ITRIG_INMUX[17] = 15;    /*  */
    LPC_INMUX->DMA_INMUX_INMUX[0] = 31;    /*  */
    LPC_INMUX->DMA_INMUX_INMUX[1] = 31;    /*  */


#endif


    /* Make sure fixed pin function is disabled and assign something safe to it */
//    Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
//    Chip_SWM_DisableFixedPin(SWM_FIXED_ADC6);
//    Chip_SWM_DisableFixedPin(SWM_FIXED_ADC7);
//    Chip_SWM_DisableFixedPin(SWM_FIXED_ADC8);
//    Chip_SWM_DisableFixedPin(SWM_FIXED_ADC9);
//    Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);

//    Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
    Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO19, PIN_MODE_PULLUP);
    Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO20, PIN_MODE_PULLUP);

//    Chip_IOCON_PinDisableOpenDrainMode(LPC_IOCON, IOCON_PIO18);


    Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO);

    // Switches
    Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, 0, PORTPIN_SW1);
    Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, 0, PORTPIN_SW2);

    // Set LEDs
    Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, PORTPIN_LED1);
    Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, PORTPIN_LED2);

// PIN 17
    Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO17, PIN_MODE_PULLDN);
//    Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO17, PIN_MODE_INACTIVE);
    Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, 0, PORTPIN_MODESENSE);

// PIN 18
    Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO18, PIN_MODE_INACTIVE);
//    Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, 0, PORTPIN_SYNCDRIVE);
//    Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, PORTPIN_SYNCDRIVE);

SYNC_STROBE_INIT();


LED_1(OFF);
LED_2(OFF);

mrt_counter = 0;
PatternNdx = 0;

BlinkTimePtr = PatternList[SyncMode][FlashMode][PatternNdx];
BlinkTimeNdx = 0;

SyncStrobe = 0;
Sw1PinTime = 0;
Sw2PinTime = 0;


    /* Enable SysTick Timer */
SysTick_Config(SystemCoreClock / TICKRATE_HZ);



This is my first NXP and ARM processor hardware design.... Its been a challenge coming up to 'speed' with everything

I Will look for that FAQ.    Again TheFallGuy- Thanks 

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Thu Oct 16 14:55:46 MST 2014
There is an FAQ on debugging a hard fault.

But given your PC, looks like you have stack corruption
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