[Resolved] UART failing to detect breaks that it should

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by ohoulihan on Thu Jul 30 07:38:57 MST 2015
Short version:

I'm using an NXP LPC1347 to decode DMX signals. It's working on some vendor's DMX but not others. I've tracked the issue down to the UART not detecting shorter length breaks, even though these shorter breaks are still much bigger than the the minimum that the user manual says should be detected.

What's going on? How can I detect these?

Long version:

The DMX protocol is roughly RS-485. Essentially it's a break (logical low for more than 90 us), a blip of a high, then 513 frames of data ( each 1 low start bit, 8 data bits, 2 high stop bits) at 250,000 baud.

Some DMX signals are being received perfectly, however for others, we are almost never getting break or frame error interrupts. We're still getting all the data and data interrupts - it's just useless since we don't know when it starts or stops.

Here's a DMX signal that we can read just fine:


Here's one  that's mostly not firing break interrupts:


The NXP manual LPC1345 user manual says that

"When RXD1 is held in the spacing state (all 0 zeros) for one full character transmission (start, data, parity, stop), a break interrupt occurs. Once the break condition has been detected, the receiver goes idle until RXD1 goes to marking state (all ones)."

Given that our data is being sent at 250,000 baud (4us per bit), and that one full character transmission is 11 bits (1 start + 8 data + 2 stop), and each bit is 4us, then each a single character is 44us. So according to the manual, any time the line is held low for 44us we should get a break interrupt. But that's way less than the 130us break that is failing to give us a break interrupt.

What does the UART actually require to trigger breaks? How can we get this 130us break to trigger?