Hello,
Using unbuffered PWM mode it is still necessary to control the duration of the carrier burst. The most straight forward method would seem to count the number of carrier cycles generated. This could be done by enabling the channel interrupt (it would occur once per carrier cycle), and terminating the burst from within the ISR when the required count is reached.
There would still need to be a relatively fast bus clock rate. Assuming 8 MHz bus, the TMOD setting would require to be 210 for a 38 kHz carrier. The channel register setting might be 64 to give 30 percent duty. Within the channel ISR processing, the PWM output could be disabled by clearing the TOVx bit within the channel status and control register (0 percent duty), and leaving other control bits unchanged. There would be a maximum of 145 cycles allowed for this to take place, prior to the commencement of the next carrier cycle (on timer overflow).
The channel interrupt would continue whether or not there is PWM output waveform, and this might also be useful tor timing the gaps between carrier bursts, without the necessity for using the other TIM module.
Regards,
Mac