Bastian Goericke

Getting IIC to work with S912 - 9S12DG256.

Discussion created by Bastian Goericke on Apr 9, 2008
Latest reply on Apr 21, 2008 by Bastian Goericke
Hi,

for days I am trying to get the IIC bus to work on an 9S12DG256. Now, I was hoping you guys could give me some hints what the problem might be.
First of all, I am using the PLL with 24 MHz. Therefore I am using a SCL clock divider of 80 (IBFD = 0x14). Hope that is correct.
I am using the ICC Compiler. This is my code:

Code:
IBFD = 0x14;  // init IBFDIBAD = 0xA0;  // set slave address
IBCR |= 0b10000000;              // IBEN = 1 - IIC bus enableIBCR |= 0b01000000;              // IBIE = 1 - IIC interrupt enable
while(IBSR&0b00100000)
{
printf("wait until bus is free");
};
printf("bus free");
 
IBCR |= 0b01000000;              // IBIE = 1 - IIC interrupt enable
IBCR |= 0b00010000;              // TX/RX = 1 - transmit mode
IBCR |= 0b00100000;              // MS/SL = 1 - master mode - START signal
printf("START");
IICDR = 0b10010000;              // address slave
printf("slave addressed");

The "START" output is reached but never is the "slave addressed". The controller seems to stop at
IICDR = 0b10010000;
leaving the SDA high (5 V) and the SCL low (0 V).

I have been trying various things but neither seemed to work. Any help would be appreciated.

Regards,
Bastian Goericke

 
 
Added p/n to subject.


Message Edited by NLFSJ on 2008-04-16 03:37 PM

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