We are using MK60FN1M0 MCU and are planning to interface two memories: 8-bit SRAM and 8-bit NAND Flash. However, some of the pins are multiplexed between FlexBus and NFC, which in our case are NFC_WE/FB_RW and some FB address lines with NFC IO lines.
A block diagram showing the detailed connections is attached below.
My questions are:
1. Is the above block diagram realizable? Is there any scope to improve it?
2. If so, how does the FlexBus/NFC arbitration actually work?
In our application, we might need to access the second memory when the MCU is busy with one or we might need to transfer some data between memories through K60. For example: If K60 is writing/reading from NAND Flash and at the same time SRAM access is required, how will this be handled? Does the MCU automatically select the memory? If it is to be handled with application software, how do we handle this?
3. From where can we get the detailed description of SIM_SOPT6 register?
Any help is appreciated.