Bhavana Yarlagadda

regarding PLL lOCK in HCS08

Discussion created by Bhavana Yarlagadda on Mar 18, 2008
Latest reply on Apr 4, 2008 by Bhavana Yarlagadda


I have a question regarding the PLL inside the MC9S08DZ60.

 We are performing some temperature tests on modules built using these processors and we are seeing failures at -40 degC. We are using an external 16MHz crystal as the clock source to generate 20MHz bus clock using the PLL.

 When we analysed the problem we found that the PLL is losing lock when we reduce the temperature from room temp to -40 degC. Also, when we do a power cycle at -40 degC, we find that the PLL fails to lock. We also found that when we try power cycle at -40 degC, the processor transitions from FEI->FBE->BLPE mode and fails at a step where it waits for PLL to lock (we wait for 2.5ms for the PLL to lock).

 What could be the reason for the PLL to lose lock at -40 degC? Also why is the PLL failing to lock when we do a power cycle at -40 degC?