So After being able to get the secureboot process working on a P4080, I am trying to set things up on a T series processor.
Here is what I have so far:
Created OTPMK and programmed, Created SRKH and programmed, Checked for OTPMK errors - none found - before moving onto setting up the RCW. In the RCW; set SB_EN bit, created LAW (Based on working LAW from p4080, addr is known to be in first 3.5Gb, set SCRATCHRW1 with location of CSF. Sign U-Boot with CST 2.0, and program board with U-boot and CST at addresses. Currently the board goes into a machine check (0x1 in SCRATCHRW2) so I think there might be an issue with a PBL / RCW command I am issuing. But looking at example ESBC LAW's from SDK 2.0 doc and prior I look to be doing things correctly. Is there something else I may be missing?