I want to receive data that are in BT.1120 DDR mode with i.MX6DL.
However, I have not been successful.
Does the i.MX6DL get the first SAV data with positive edge ?
I checked the following documents but couldn't find a description about it.
126.96.36.199.1 BT.656 and BT.1120 Video Mode
188.8.131.52.4 BT.1120 mode
I need to understand the timing spec detail because those data are from FPGA.