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Cannot disable the cache in region 9 of Kinetis K61

Question asked by Maurizio Colella on Jun 6, 2016
Latest reply on Jun 16, 2016 by isaacavila

I have some external peripheral on CS0 configured in region 9 the is cached for default.

So I tried to disable the cache in region 9 of Kinetis K61. I correctly changed the LMEM_PCCRMR register putting 0 into bits 12 and 13. After this I can read back the value from that register but I noticed that cache is still enabled.

I always get 16 consecutive read cycle on first access to CS0 while successive access are not output on the flexbus.

 

I moved CS0 configuration from region 9 to 11 (non cacheable) and this fixed my problem.

 

Why cache on region 9 cannot be disabled? Is there something wrong with my procedure?

 

Best Regards

 

M. Colella

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